FPGA Design from Scratch
From a single logic gate to a hardware accelerator driven from Python. Learn how FPGAs work inside, how to describe circuits in Verilog and VHDL, how to prove them correct in simulation, and how to run them on a real PYNQ-Z2 board.
The Road Map
About this course
An FPGA is a chip whose circuitry you design yourself. Instead of writing instructions for a processor to execute one after another, you describe hardware — thousands of operations wired up to run at the same time, every clock cycle. That is why FPGAs sit inside radio telescopes, particle-physics triggers, 5G base stations, trading systems, medical imaging and AI accelerators.
This course assumes nothing beyond curiosity and a little programming. Part I builds digital logic from the ground up; Part II opens the FPGA to show look-up tables, flip-flops and routing; Part III teaches the two hardware description languages; Part IV makes simulation a habit; Part V takes designs onto the board and through timing closure; Part VI builds a UART, FIFOs and a fixed-point filter; and Part VII joins the FPGA to the ARM processors on the same chip so that Python in a Jupyter notebook can drive your own hardware.
Each chapter has diagrams, derivations where the mathematics matters, a Python program you can run in the page, and exercises with worked solutions. Every Verilog and VHDL listing on this site has been compiled and the designs simulated with free tools before publication.
What you need
A computer and free simulators: Icarus Verilog, GHDL and a waveform viewer such as GTKWave. No board needed.
A PYNQ-Z2 board (Zynq XC7Z020) and the free edition of AMD Vivado on Linux or Windows. A micro-SD card for the PYNQ image in Part VII.
A 3.3 V USB–serial adapter for the UART chapter, and some patience with long Vivado installs.
Tip: keep each chapter's files in their own folder or Vivado project. Each chapter is self-contained, and a few small modules (such as counter and mux4) are redefined with different ports in different chapters to suit the lesson.
22
Chapters
7
Parts
200+
Verified HDL listings
20+
Python simulations
Course Structure
Digital Foundations
Binary numbers, Boolean logic, the combinational building blocks, and the clocked flip-flop. Everything an FPGA is made of, starting from nothing.
Inside the FPGA
What a field-programmable gate array actually is: look-up tables, flip-flops, programmable routing, and the hard blocks of the Zynq-7020 on the PYNQ-Z2.
Hardware Description Languages
Describing circuits, not programs. Every construct is shown in both Verilog and VHDL so you can read either and choose one.
Simulation & Verification
Free simulators (Icarus Verilog, GHDL), self-checking testbenches, waveforms, and finite state machines — all verified before touching the board.
From Code to Bitstream
Vivado, constraint files, synthesis, place and route, and the bitstream. First lights on the PYNQ-Z2, then timing closure and crossing clock domains safely.
Real Designs
Three designs every FPGA engineer builds: a UART to talk to a PC, memories and FIFOs to hold data, and fixed-point arithmetic for signal processing.
Hardware Meets Software
The Zynq system-on-chip, the AXI bus, a custom peripheral with registers, and finally Python in a Jupyter notebook driving your own hardware accelerator.
Recommended Books
- Digital Design and Computer Architecture — S. Harris & D. Harris. Clear foundations, with Verilog and VHDL shown together.
- FPGA Prototyping by Verilog Examples and FPGA Prototyping by VHDL Examples — P. P. Chu. Practical, board-oriented, many small designs.
- The Zynq Book — L. H. Crockett, R. A. Elliot, M. A. Enderwitz & R. W. Stewart (University of Strathclyde). The Zynq-7000 processing system and programmable logic in depth.
- The Designer's Guide to VHDL — P. J. Ashenden. The reference for VHDL.
- Verilog HDL: A Guide to Digital Design and Synthesis — S. Palnitkar. A classic introduction to Verilog.